The nanowire MOSFET has a cylindrical gate electrode giving the device a superior gate control of the conducting channel. This helps to reduce debilitating short-channel effects, such as drain induced barrier lowering (DIBL) and excessive sub-threshold swing.
In devices with nanoscale gate length, the device electrostatics in the sub-threshold regime is dominated by capacitive coupling between the gate, source and drain electrodes. Previously, we have shown that in the double-gate (DG) MOSFET structure, the 2D potential distribution within the device body can be analytically determined by conformal mapping techniques based on Laplace's equation. Although the nanowire MOSFET is a 3D structure, we have further shown that the DG MOSFET results can be successfully applied to the central, longitudinal cross-section of the nanowire structure as well, by performing an appropriate device scaling to compensate for the difference in gate control between the two devices. This mapping is described in terms of the characteristic longitudinal field penetration lengths of the DG and nanowire MOSFET geometries.
A modeling framework for short-channel nanowire MOSFETs that covers a wide range of operating conditions has been developed. Near and above threshold, the influence of the electronic charge on the electrostatics is taken into account in a precise, self-consistent manner by combining suitable model expressions with the 3D Poisson’s equation in the device body. When drain voltage is applied, the self-consistency extends to a calculation of the quasi-Fermi potential and the drain current. In strong inversion, where the electronic charge dominates the device electrostatics, the device behavior approaches that of long-channel devices.
Since short-channel effects are inherently contained in this analysis, no adjustable parameters are needed. The modeling framework covers the full range of bias voltages from sub-threshold to strong inversion. The device considered has a gate length of 25 nm and a silicon diameter of 12 nm, permitting the use of classical electron statistics and the drift-diffusion transport mechanism. The device electrostatics and the drain current calculated from the present models show excellent agreement with numerical simulations.
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